Course overview
Hardware Description Languages describe the architecture and behaviour of discrete and integrated electronic systems. Verilog is a Hardware Description Language which widely used for designing gate level circuit to complex designs like system on chip. At beginning Verilog is used for verification also. This course will provide you a depth knowledge as well as industrial example how to use Verilog constructs. This course will also provide synthesis and simulations of digital circuit using Verilog. Once you go through all the concept you will able to implement any digital logic. We also provide good set of assignments so that you will come to know about unique coding methodologies that will help your career in semiconductor industry.

Course Agenda
Following objectives will be covered during this course:
The objective of the course is to provide understanding of the techniques essential to the Verilog programming for Verification and Testing. Basic designing and implementation constructs
Modular designs Data types and operators in Verilog.
Procedural blocks and assignments.
Different abstraction modelling.
Verilog Functions and tasks.
User defined Primitives, Value change Dump, Compiler directives.
Synthesizable and simulation constructs.
Concept of events, delay modelling.
Depth knowledge of verification and test benches.

At completion of this course, you will be able to understand
Difference between programming language like C and HDL.
Basic to advance Verilog language constructs
Verification process and generation of test environment using Verilog
Memory modelling and data transmission.
Able to design FSM for given problem.

Prerequisite:
Digital logic design Basic knowledge of a programming language like C will be good